1. Field of the Invention
The present invention relates to a method of making a metal plug, and more particularly to a method of embedding a metal plug or connector of a metal in a via hole, or a plated through hole, which interconnects several layers of multilayer wires on a semiconductor integrated circuit or a contact hole which interconnects a semiconductor substrate and a wire.
2. Description of the Prior Art
Semiconductor integrated circuits such as ULSI circuits are composed of a large number of circuit components and interconnections that are packed in very small size and with very high density. On those integrated circuits, the via holes which provide interconnections between layers of multilayer wires and the contact holes which interconnect semiconductor substrates and wires have diameters that are as small as 0.35 .mu.m. The conventional bias sputtering process for producing interconnections of Al fails to provide good interconnections between those connection holes in terms of step coverage.
Metal plugs have been proposed and put to use in order to improve the step coverage with respect to such interconnections between such small via holes and contact holes. Metal plugs are selectively embedded in via holes and contact holes. One of the metal plugs that has drawn much attention in the art is in the form of a tungsten plug that provides good step coverage and has a lower contact resistance than plugs of polycrystalline silicon.
Heretofore, a tungsten plug may be made according to eigher a selective tungsten CVD process or a blanket tungsten CVD process. The blanket tungsten CVD process is more advantageous than the selective tungsten CVD process because it is stabler and more effective to make metal plugs in connection holes of different depths.
FIGS. 1A through 1C of the accompanying drawings show a conventional method of interconnecting wires with a metal plug.
First, as shown in FIG. 1A, a lower wire 2 is formed as a diffused layer in a silicon substrate 1, and then an insulating film 3 of SiO.sub.2, for example, is deposited on the upper surface of the silicon substrate 1. After a connection hole 4 for providing an electric interconnection is formed in the insulating film 3, a film 5 of TiN, for example, is deposited as an adhesion layer on the entire surface of the insulating film 3 including the connection hole 4.
Then, as shown in FIG. 1B, a layer of a refractory metal such as a blanket tungsten layer 6 is deposited on the film 5 by CVD.
Thereafter, as shown in FIG. 1C, the blanket tungsten layer 6 and the film 5 are etched back to leave the tungsten as a metal plug 6A and the film 5 only in the connection hole 4. Then, an upper wire 7 is deposited on the insulating film 3 so as to be connected to the metal plug 6A.
A film 8 of TiSi.sub.2 may be deposited as a heat resistant layer on the surface of the diffused lower wire 2 by SITOX (silicidation through oxide).
According to the conventional process, it is necessary to provide the TiN film 5 as an adhesion layer between the CVD blanket tungsten layer 6 and the insulating film 3 for better adhesion therebetween. When the blanket tungsten layer 6 is etched back and also the TiN film 5 is etched, overetching is required to ensure sufficient removal of the materials. However, since the etchant concentrates on the TiN film 5 on the side wall of the connection hole 4, the TiN 5 is considerably overetched as shown in FIG. 2 of the accompanying drawings. Consequently, the upper wire 7 which will subsequently be deposited may not reliably be formed over the metal plug 6A.